Fault tolerant design of magnetic bearing digital

2022-10-19
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Fault tolerant design of digital controller of magnetic bearing based on Dual DSP

Abstract: This paper introduces a dual DSP hot standby fault-tolerant control scheme applied to magnetic bearing, which adopts clock synchronization technology, realizes fault-tolerant processing of the system by bus voting module, and realizes hardware fault judgment by hardware judgment module. The central arbitration module conducts complex arbitration according to the results of the two decision modules, and completes the switching and perfect alarm logic, so as to improve the brand popularity of the magnetic bearing control and further increase the reliability of the system

Keywords: fault tolerance; Magnetic bearing; controller; CPLD; DSP

Introduction

electromagnetic bearing (AMB) is a new type of high-performance bearing that uses controllable electromagnetic suction to suspend the rotor. It has a series of characteristics such as no contact, no friction, high speed, high precision, not contrary to the established concept of the majority of consumers, and needs lubrication and sealing. It has broad prospects in high-tech fields such as transportation, ultra-high speed and ultra precision machining, aerospace and so on

because the magnetic levitation system is inherently unstable, the quality of the control system will directly determine the performance of the magnetic bearing. In recent years, digital control has developed rapidly at home and abroad. Digital controller will be the mainstream of magnetic bearing control in the future. Figure 1 is the structural block diagram of digital magnetic bearing control system. Considering the requirements and costs of industrial applications, this paper carries out fault-tolerant design for the controller in the dotted box in Figure 1, and puts forward a scheme of Dual DSP fault-tolerant controller. The fault-tolerant design of sensors, coils and power amplifiers is not discussed in this paper

fault tolerant design analysis of magnetic levitation controller

redundancy is an effective method to realize fault tolerance and improve reliability. For the magnetic bearing DSP control system, its own time margin and program space margin are very limited, so it mainly adopts hardware redundancy, that is, adopting multi DSP redundancy design to improve the reliability of the system

in the design of multi machine redundant system, the key problems are the reconfiguration strategy of multi machine, the arbitration switching logic of multi machine and the synchronization of multi machine operation. Compared with the powerful central control system, the small-scale terminal system has four obvious characteristics: the system structure is simple and the cost is low; Lack of software and hardware resources; Must have good real-time performance; The running time margin is too small. Through the above analysis and consideration of cost, this paper puts forward the design scheme of dual computer hot standby redundant control system for industrial application

design principle

the structure of this control system is shown in Figure 2, in which the redundant core control function is realized through CPLD. The analog signals are input to two DSPs for operation, and the central arbitration module selects the main DSP, and then the main DSP processes the data, timing and RS-232 output signals output to d/a conversion

input buffer module

in order to eliminate the influence of input impedance at the input end, adding a level 1 buffer for digital signals can reduce the interference of peripheral circuits. In this system, RS-232 and crystal oscillator, reset and external interrupt input signals are buffered (the output interface of RS-232 is controlled by the main DSP). In addition, for analog signals, this design realizes impedance matching through voltage follower, and reduces the error and a/d conversion time

implementation of DSP clock synchronization

because this design scheme realizes redundant control through the complete synchronization of DSP, it adopts the way that two DSPs use a crystal oscillator signal together. When the system works, the DSP can be reset only after the power supply is stable and the crystal oscillator is fully started. Through the test of the existing control system in the laboratory, the time for the power supply to stabilize and the crystal oscillator to vibrate is about 40ms, so the reset time should be greater than this value. In addition, in order to improve its anti-interference, the reset signal should be buffered by CPLD after passing through Schmidt trigger, and then connected to the reset end of DSP

hardware fault judgment module

in this design, the output signal of each DSP clkout pin is used as the basic condition for judging hardware faults. If the DSP hardware works normally, clkout pin will output a fixed clock waveform; If the clkout of the system has no clock waveform output, it will be considered that the DSP hardware is abnormal, and then the central arbitration module will isolate the DSP. The specific implementation method is that the clkout signal is sent to the monostable trigger 74ls123 through the frequency divider realized by CPLD. If the clkout signal of the system is abnormal, 74ls123 will produce a jump, driving the central arbitration module to isolate the abnormal DSP

output bus voting module

output bus voting module mainly realizes the fault tolerance of the system and solves the soft fault of the system. When the bus output signals of two DSPs are compared, if they are different, it indicates that a DSP or two DSPs have a soft fault. The system suppresses the error output, and the central arbitration module handles this situation to make the system realize fault tolerance. Considering the error of a/d conversion, this design only votes on the upper 8 bits of the output data bus

central arbitration module

the central arbitration module mainly analyzes the results output by the output bus voting module and the hardware fault decision module, makes judgments, and determines the main DSP. The main function of the main DSP is to control the external output, including the control of d/a conversion output and RS-232 output

arbitration mode of the central arbitration module

when the hardware decision module and the software voting module do not report errors, the system uses the default DSP1 as the main DSP; If one DSP in the hardware decision module reports an error, isolate the DSP that makes the error, and the other is the main DSP, and give an alarm; If both DSPs report errors, they will report the system errors and provide the interface signal that the control system generates errors, so that the system can start the security system in the shortest time. When both DSPs do not generate DSP hardware error, if the software voting module reports an error, start the reset signal through CPLD, reset the two DSPs again, and the CPLD core control module records the reset times. If the system has been reset more than four times continuously and there is no correct output bus result or the self-test of both DSPs fails, the security system will be started; If one DSP fails the self-test, isolate the DSP, and the system will output an alarm signal. At the same time, the control power of the main DSP is handed over to another DSP; If the reset times are less than four and the correct output bus results appear, the CPLD module will clear the reset count times, and the main DSP is still DSP1

dsp software implementation

the software flow diagram of the system is shown in Figure 3, in which the dotted box is realized by CPLD. In the DSP system, the watchdog module is used to solve the problem of system program flying. After the system is reset, the system program status is detected by detecting the reset flag bit of the watchdog circuit. If the system watchdog is reset, the DSP generates an output bus error through software, and the result is the same as the processing method of the output bus error; Otherwise, the reset is caused by the arbitration module, and the self-test is performed. If the self-test fails, CPLD will automatically isolate the hardware. 8 in design The stress-strain, stress time, strength time and other curves can be selected for display and printing as required; Reduce the reset time of the system and the continuity of the control system. When storing data, the dual port RAM idt7133 is used, so that the temporary data of the previous calculation can be quickly used after reset (take each other's data and average with their own data), so as to minimize the impact of reset on the system

implementation of self-test

the signal transmission control gate is controlled by the central arbitration module of CPLD to realize a/d conversion, which is converted to the reference level (2.5V is used in this design), and then calculated by the actual control algorithm, and the results are output to CPLD for comparison with the offline calculated results (stored on CPLD). If the real-time calculation results are the same as the offline results, it means that the system self-test is passed, otherwise, Automatically isolate the DSP that fails the self-test

reliability evaluation of the system

the central control module of the system is realized by CPLD, and its reliability is much higher than that of DSP based on program. In this system, the failure rate of CPLD is approximately regarded as 0, that is, the mean time between failures is much greater than DSP

according to the electronic system model, the reliability of a single machine follows an exponential distribution with time, that is, RI (T) =e-lit (Li is the failure rate), so the mean time between failures of a single machine system is 1/l, while the mean time between failures of this scheme is:

significantly increase the temperature of fibronectin oxidation decomposition. However, the trouble free time of this system is 1.5 times that of a single machine, which greatly improves the reliability of the controller system

conclusion

the magnetic levitation fault-tolerant controller scheme proposed in this paper adopts the software and hardware collaborative design, realizes the functions of fault diagnosis and system reconstruction, greatly improves the reliability of the controller, and provides performance guarantee for the industrial promotion and application of magnetic bearings. (end)

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